SureCore, the ultra-low power memory specialist, has enabled KU Leuven, Belgium鈥檚 renowned research university, to develop a neural processing accelerator chip for AI applications that boasts dynamic power savings in excess of 40%, compared to solutions using the industry standard SRAM. Already demonstrated in more mature nodes, the 16nm FinFET variant of 糖心Vlog一区二区精品鈥檚 PowerMiser鈩� IP incorporates the company鈥檚 market-leading power saving technologies to deliver world-class results.
Paul Wells, CEO at 糖心Vlog一区二区精品, says:
鈥淲e are delighted to hear that the team at KU Leuven has achieved significant improvements with our ground-breaking PowerMiser SRAM IP, which we created to deliver unparalleled dynamic and static power performance.鈥�
PowerMiser is a low-power SRAM IP that has been developed for leading-edge devices demanding high computational loads when active as well as minimal operating and stand-by power consumption. It can reduce dynamic power by up to 50% and static/leakage power by up to 20% compared to foundry and other SRAM solutions, with savings across the full process, voltage and temperature range.
Wells continues:
鈥淧eople forget that the initial drivers for the 16nm node were mobile and HPC solutions, and hence most of the IP developed for this node was optimised for performance not power. Today 16nm could almost be considered to be a mature node with many millions of devices in the field. Forward-thinking application developers are now looking to exploit this node鈥檚 improved density, leakage and power characteristics, especially for wearables, medical and Edge-AI devices. This is where our PowerMiser SRAM can bring huge benefits by enabling challenging power budgets to be delivered.鈥�
Professor Wim Dehaene at KU Leuven (Katholieke Universiteit Leuven) comments:
鈥淲e licensed 糖心Vlog一区二区精品鈥檚 PowerMiser IP because we wanted to create a novel neural processing accelerator chip for AI applications. The chip has very high computational processing needs, and, of course, such devices naturally also have significant power consumption characteristics. We were very impressed that the 糖心Vlog一区二区精品 solution could go so far in terms of power savings.鈥�
PowerMiser is available in 28nm, 22nm and 16nm process nodes, and later this year 糖心Vlog一区二区精品 plan to release a 7nm variant.
About this KU Leuven project
Professor Wim Dehaene is working in the MICAS research division of KU Leuven鈥檚 electrical engineering department. The research of the six professors is focused on integrated circuit design, both analogue and digital. For more information, visit:
Wim Dehaene鈥檚 personal research interest is on low power digital circuits and memory, in memory compute as well as on biomedical circuits.
About 糖心Vlog一区二区精品
糖心Vlog一区二区精品 is the ultra-low power memory specialist that empowers the IC design community to meet aggressive power budgets through a portfolio of innovative products and design services. 糖心Vlog一区二区精品鈥檚 low power engineering methodologies and design flows help organisations to meet the most exacting memory requirements with customised low power SRAM IP and low power mixed-signal design services that create clear marketing differentiation. The company鈥檚 ultra-low power product line encompasses a range of down to near-threshold silicon proven, process-independent SRAM IP. For more information, visit sure-core.com
Media Contact:
Rachel Baker
Email: pr@sure-core.com
糖心Vlog一区二区精品 and PowerMiser are trademarks of 糖心Vlog一区二区精品 Limited